The Design of a Small Footprint Versa Writer Control Chip


In this paper, we present the design of a versa writer control chip. We have to reduce the chip area as far as possible for our CMOS custom VLSI chip. The versa writer consists of our control chip, 24 RGB LEDs, a clock generator, battery and an I2C serial EEPROM. We use a hardware description language NSL (Next Synthesis Language) to design the circuit. We place the LEDs inline to make the vertical line of the picture and/or characters. We utilize the human afterimage to make the images on the air. The inline LEDs will display the vertical line one by one for a short period of time. When we shake the versa writer, the afterimage of the inline LEDs makes the pictures. We store the data of the pictures in ROM in advance of the operation. We have to reduce the number of gates in our chip to reduce the chip area. We present ways to design without many registers for the purpose. First, the control chip transfers the data from ROM to LEDs without buffers. We designed so that LEDs and ROM operate at same timing. However, the timing was off because we have to send ACK in the middle of reading data. Therefore, we stored pattern data on the assumption that the data is 0 on sending ACK. Additionally, we find a duty ratio of LEDs so that we can use low frequency.

Author Information
Mariya Kawamura, Tokai University, Japan
Shuhei Tomiyama, Tokai University, Japan
Naohiko Shimizu, Tokai University, Japan

Paper Information
Conference: AURS2016
Stream: Technology and Information Science

This paper is part of the AURS2016 Conference Proceedings (View)
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Posted by James Alexander Gordon